Multiprocessor system having synchronization control mechanism

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395200, 364DIG1, 364271, 3642711, 3642712, 3642713, 3642707, G06F 1300

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active

052222292

ABSTRACT:
A synchronization controller is provided for each processor in a multiprocessor system. The synchronization controllers are commonly connected to a synchronization signal bus. Each of the synchronization controllers has a synchronization wait signal transmitting means for receiving a synchronization request signal from a corresponding processor, signal means for transmitting a synchronization wait signal to the synchronization signal bus, a synchronization register for specifying the other processors to be synchronized with the corresponding processor, a comparator means for comparing the signal from the synchronization signal bus with the content of the synchronization resister, and a means for transmitting to the corresponding processor a synchronization-acknowledge signal based on the result of comparison by the comparator means.

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patent: 4627055 (1986-12-01), Mori et al.
patent: 4698746 (1987-10-01), Goldstein
patent: 4785394 (1988-11-01), Fischer
patent: 5006979 (1991-04-01), Yoshie et al.

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