Multiprocessor system having multiple classes of instructions fo

Details Multiprocessor system having multiple classes of instructions fo Multiprocessor system having multiple classes of instructions fo

1993-01-19

1994-07-26

Lall, Parshotam S.

Boots, shoes, and leggings

3642287, 364230, 3642281, 3642468, 3649314, 36493146, 3649692, 364DIG1, 395375, 395725, G06F 1516, G06F 13374

Patent

active

053332970

ABSTRACT:
A computer system in which each of certain critical instructions, all performing multiple main storage accesses to shared data, have the appearance of executing required main storage accesses atomically with respect to a predefined set or class of instructions.
The instructions in each set, referred to as relatively atomic instructions, are grouped together based on the data structure or object class they affect.
The computer system comprises: (a) shared memory means; (b) a plurality of processors, coupled to said shared memory means, wherein each processor has an instruction set divided into a plurality of instruction classes; (c) means for constraining an instruction in one of said classes running on one of said plurality of processors, to run atomically relative to any instruction in said class running on any other of said plurality of processors in said system; (d) means for signalling between said processors to indicate when an instruction in one of said classes is running and for providing an indication of which particular class the instruction is a member of; and (e) means for selectively delaying the operation of all other instructions in said particular class on every other processor in said system.

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