Multiprocessor system for intercommunication of processors

Details Multiprocessor system for intercommunication of processors Multiprocessor system for intercommunication of processors

1984-07-18

1988-01-12

Chan, Eddie P.

Boots, shoes, and leggings

G06F 1300, G06F 1516

Patent

active

047195622

ABSTRACT:
The system according to the invention comprises a central microprocessor and peripheral microprocessors. A direct-access transfer memory is provided for the communication of the processors with one another. The memory is divided into as many distinct, determined zones as there are peripheral processors. The memory is connected to two addressing buses of which the latter serves equally well to address the boxes of the memory by the central microprocessor and to address the zones of the memory allocated to the peripheral microprocessors. The system is particularly well adapted to data transfers between a telephone automatic switch and subscribers' sets.

REFERENCES:
patent: 4209839 (1980-06-01), Bederman
patent: 4253144 (1981-02-01), Bellamy et al.
patent: 4354225 (1982-10-01), Frieder et al.
patent: 4368514 (1983-01-01), Persaud
patent: 4404628 (1983-09-01), Angelo
Microprocessors and Their Applications, Fifth Euromicro Symposium on Microprocessing and Microprocessing ad Microprogramming, 28-30 aout 1979, Goteborg, pp. 317-327, North-Holland Publishing Company, Amsterdam (NL): H. A. Deshmukh et al.: "A Hierarchically Structured Multi-Microprocessor System", *FIG. 4 de p. 321; FIG. 5 de p. 322; p. 323; Premiere Colonne, Deuxieme Colonne, lignes 1-7*.
Electronic Design, vol. 24, No. 12, 7 Jun. 1976, pp. 132-136, Rochelle Park, (U.S.A.); D. Chung: "Multiprocessor Control Systems", *p. 136, Premiere Colonne, lignes 8-36, Deuxieme Colonne, lignes 1-24; FIG. 11*.

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