Multiprocessor system employing dynamically programmable process

Details Multiprocessor system employing dynamically programmable process Multiprocessor system employing dynamically programmable process

1984-12-10

1987-02-03

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1516

Patent

active

046412387

ABSTRACT:
There is disclosed a multiple processor system which employs dynamically programmable processing elements (DDPE) utilized as slave devices and under the control of a master processor. A plurality of DPPE's have input/output data lines connected to a digital signal processing (DSP) bus. Communication between the DPPE's is afforded via the (DSP) bus from a master processor which interfaces with the bus via a dual port memory designated as a global memory. Each DPPE is connected together via another bidirectional serial bus so that the individual DPPE's can communicate one with the other in regard to processing and exchanging of arithmetic data. The digital signal processing bus allows the master processor to interface with the DPPE devices for control of input/output and control functions. In this manner, the master processor interfaces directly with a codec and has outputs which allow the transmission of plaintext or ciphertext data which data is formed by arithmetic operations performed by the slave DPPE's. The master processor also accesses a host computer and user terminal via a deuce circuit which essentially is a dual enhanced communications element. The status of the DPPE's and priority between the DPPE's and the master processor is controlled by an arbiter circuit which essentially controls the access of the DPPE's to the dual port memory (global memory) via the digital signal processing bus. The system is employed to operate on complicated algorithms and is patricularly adapted for use as a voice processor or modem processor is regard to modern communications systems.

REFERENCES:
patent: 4439839 (1984-03-01), Kneib et al.

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