Multiprocessor system

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G06F 1120

Patent

active

043565506

ABSTRACT:
A multiprocessor system, the kind in which two or more separate processor modules are interconnected for two power supplies, provides the entire power for the device controller in the event the other power supply fails. The distributed power supply system permits any processor module or device controller to be powered down so that on-line maintenance can be performed in a power-off condition while the rest of the multiprocessor system is on-line and functional.
The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code. The memory system includes a map which translates logical addresses to physical addresses and which coacts with the multiprocessor system to bring pages from secondary memory into primary main memory as required to implement a virtual memory system. The map also provides a protection function. It provides inherent protection among users in a multiprogramming environment, isolates programs from data and protects system programs from the actions of user program. The map also provides a reference history information for each logical page as an aid to efficient memory management by the operating system.
The multiprocessor system includes in the memory of each processor module an error detection and correction system which detects all single bit and double bit errors and which corrects all single bit errors in semiconductor memory storage.

REFERENCES:
patent: 3827030 (1974-07-01), Seipp
patent: 3859638 (1975-01-01), Hume, Jr.
patent: 4004283 (1977-01-01), Bennett et al.
patent: 4015243 (1977-03-01), Kurpanek et al.
patent: 4048672 (1977-09-01), Seiden et al.
patent: 4050096 (1977-09-01), Bennett

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