Multiprocessor system

Details Multiprocessor system Multiprocessor system

1982-11-30

1985-03-12

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1516

Patent

active

045049068

ABSTRACT:
In a multiprocessory system comprising a plurality of CPUs interconnected by a common bus, means are provided whereby the CPUs are periodically and cyclically enabled to access the bus. Data transfer from one CPU to another is performed by first storing the data into a main memory connected to the bus, then transferring the data from main memory to the destination CPU when the latter is enabled to utilize the bus and is in a condition to accept the data. Means can also be provided whereby, when data must be immediately transferred from one CPU to another, the sending CPU stores the data in main memory, generates signals whereby the destination CPU is given use of the bus, and generates an interrupt which causes transfer of the stored data into the destination CPU.

REFERENCES:
patent: 4141067 (1979-02-01), McLagan
patent: 4404628 (1983-09-01), Angelo

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