Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
2008-07-29
2008-07-29
Kizou, Hassan (Department: 2619)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C710S317000
Reexamination Certificate
active
10868181
ABSTRACT:
Improved method and apparatus for parallel processing. One embodiment provides a multiprocessor computer system that includes a first and second node controller, a number of processors being connected to each node controller, a memory connected to each controller, a first input/output system connected to the first node controller, and a communications network connected between the node controllers. The first node controller includes: a crossbar unit to which are connected a memory port, an input/output port, a network port, and a plurality of independent processor ports. A first and a second processor port connected between the crossbar unit and a first subset and a second subset, respectively, of the processors. In some embodiments of the system, the first node controller is fabricated onto a single integrated-circuit chip. Optionally, the memory is packaged on plugable memory/directory cards wherein each card includes a plurality of memory chips including a first subset dedicated to holding memory data and a second subset dedicated to holding directory data. Further, the memory port includes a memory data port including a memory data bus and a memory address bus coupled to the first subset of memory chips, and a directory data port including a directory data bus and a directory address bus coupled to the second subset of memory chips. In some such embodiments, the ratio of (memory data space) to (directory data space) on each card is set to a value that is based on a size of the multiprocessor computer system.
REFERENCES:
patent: 5251131 (1993-10-01), Masand et al.
patent: 5970232 (1999-10-01), Passint et al.
patent: 6085303 (2000-07-01), Thorson et al.
patent: 6101181 (2000-08-01), Passint et al.
patent: 6230252 (2001-05-01), Passint et al.
patent: 6516372 (2003-02-01), Anderson et al.
patent: 6604161 (2003-08-01), Miller
patent: 6633958 (2003-10-01), Passint et al.
patent: 6674720 (2004-01-01), Passint et al.
patent: 6711636 (2004-03-01), Miller
patent: 6725307 (2004-04-01), Alvarez et al.
patent: 6751698 (2004-06-01), Deneroff et al.
patent: 2002/0071443 (2002-06-01), Tsukamoto et al.
Deneroff Martin M.
Kaldani Givargis G.
Koren Yuval
McCracken David Edward
Venkataraman Swami
Baker & Botts L.L.P.
Kizou Hassan
Rutkowski Jeffrey M
Silicon Graphics Inc.
LandOfFree
Multiprocessor node controller circuit and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiprocessor node controller circuit and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiprocessor node controller circuit and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3927078