Multiprocessor-memory data transfer network

Details Multiprocessor-memory data transfer network Multiprocessor-memory data transfer network

1982-11-30

1985-01-01

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1516

Patent

active

044919158

ABSTRACT:
A data transfer system for transferring words of data in either direction between a main memory and N processors includes N registers, each of N words (or multiples of N words) capacity. Each register is connected to its associated processor to transmit data words serially at a given rate therebetween and connected to the memory to transmit N words (or multiples of N words) in parallel therebetween in succession at a rate which allows the uninterrupted serial word transfer at rate X.

REFERENCES:
patent: 3317898 (1967-05-01), Hellerman
patent: 3771137 (1973-11-01), Barner et al.
patent: 4151592 (1979-04-01), Suzuki et al.
patent: 4171536 (1979-10-01), Heuer et al.
patent: 4209840 (1980-06-01), Berardi et al.
patent: 4214305 (1980-07-01), Tokita et al.
"The Memory System of a High-Performance Personal Computer" by D. W. Clark, B. W. Lampson and K. A. Pier, IEEE Transactions on Computers, vol. C-30, No. 10, Oct. 1981.
"Semiconductor Memories: Density and Diversity" by T. Williams, Computer Design, Aug. 1984, pp. 105-116.

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