Image analysis – Image compression or coding – Parallel coding architecture
Reexamination Certificate
2011-03-22
2011-03-22
Ahmed, Samir A (Department: 2624)
Image analysis
Image compression or coding
Parallel coding architecture
C382S232000, C345S502000, C345S505000, C345S506000
Reexamination Certificate
active
07912302
ABSTRACT:
Multiprocessor decoding is accomplished in a first mode by generating with a series of n processors, from a set of data macroblocks, the entropy decoding output of each data macroblock and storing the entropy decoding output of each data macroblock in n storage elements, respectively, associated with the processors and in the second mode decoding the macroblock data from its associated storage element in response to the macroblock entropy decoding output from its associated storage element stored in an nth previous period, predetermined data from one or more adjacent macroblocks, and data produced from a previous processor in the series.
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Erik B. van der Tol, Egbert G.T. Jaspers and Rob H. Gelderblom,Mapping of H.264 decoding on a multiprocessor architecture, Philips Research Laboratories, Eindhoven, The Netherlands,Proceedings of SPIE—IS&T Electronic Imaging, SPIE vol. 5022, 2003, p. 707-718.
Stein Yosef
Sterling Gordon A.
Ahmed Samir A
Analog Devices Inc.
Bingham & McCutchen LLP
Liu Li
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