Multiprocessor cache replacement under task control

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G06F 930, G06F 1516, G06F 1300

Patent

active

044634200

ABSTRACT:
The disclosure describes a novel cache directory entry replacement method and means for central processors (CPs) in a multiprocessor (MP) based on task identifiers (TIDs) provided in each directory entry to identify the program task which inserted the respective entry. A remote TID register is provided to receive the TID from any remote CP in the MP on each cache miss cross-interrogation hit from any remote CP. Each time a respective CP (i.e. local CP) makes a storage request to its private cache directory, a congruence class in the directory is selected and the TIDs in the selected class are compared to any remote TID in the CP's remote TID register. A TID candidate is any entry in the class which compares equal to the remote TID and is not equal to the current local processor TID. It is identified as a candidate for replacement in the local cache directory on a cache miss. The candidate priorities for replacement in the selected class are: highest priority is any invalid entry, next is any TID candidate, and lowest priority is the conventional LRU candidate. The TID operation obtains early castout to main storage of any cache line associated with a task being executed in a remote CP and not associated with the task being executed in the CP casting out the line, so that the remote CP can fetch more quickly a line which it will probably need in the task it is currently executing and will not be needed by the CP casting it out. This reduces the potential for future cross-interrogation hits.

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patent: 3848234 (1974-11-01), MacDonald
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patent: 4317168 (1982-02-01), Messina et al.
patent: 4322795 (1982-03-01), Lange et al.
patent: 4394731 (1983-07-01), Flusche et al.
patent: 4399506 (1983-08-01), Evans et al.

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