Multiprocessor bus locking system with a winning processor broad

Details Multiprocessor bus locking system with a winning processor broad Multiprocessor bus locking system with a winning processor broad

1990-07-16

1992-11-24

Lee, Thomas C.

Boots, shoes, and leggings

395725, 36493541, 36493543, 3649354, 3649402, 364DIG1, 3642292, 3642401, 3642404, 3642426, 36424292, 3408255, G06F 1336, G06F 13368

Patent

active

051670224

ABSTRACT:
A method and apparatus for granting, to a select processor in a multiprocessor computing system, exclusive access to a bus for issuance of address, data and command signals thereover, wherein each processor includes bus lock request and bus lock assert elements which provide corresponding bus request and bus hold signals which are recognized by corresponding elements included in other processors connected to the bus. The bus lock according to the present invention assures the processor having lock status of privacy on the bus necessary to complete a specified operation without interruption from the other processors.

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