Multiprocessing system including a shared cache

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

364134, G06F 1300

Patent

active

044451741

ABSTRACT:
A control system for interlocking processors in a multiprocessing organization. Each processor has its own high speed store in buffer (SIB) cache and each processor shares a common cache with the other processors. The control system insures that all processors access the most up-to-date copy of memory information with a minimal performance impact. The design allows read only copies of the same shared memory block (line) to exist simultaneously in all private caches. Lines that are both shared and changed are stored in the common shared cache, which each processor can directly fetch from and store into. The shared cache system dynamically detects and moves lines, which are both shared and changed, to the common shared cache and moves lines from the shared cache once sharing has ceased.

REFERENCES:
patent: 3566358 (1971-02-01), Hasbrouck
patent: 3581291 (1971-05-01), Iwamoto et al.
patent: 3723976 (1973-03-01), Alvarez et al.
patent: 3735360 (1973-05-01), Anderson et al.
patent: 3771137 (1973-11-01), Barner et al.
patent: 3845474 (1974-10-01), Lange et al.
patent: 3848234 (1974-12-01), MacDonald
patent: 4056844 (1977-11-01), Izumi
patent: 4075686 (1978-02-01), Calle et al.
patent: 4078254 (1978-03-01), Beausoleil et al.
patent: 4096567 (1978-06-01), Millard et al.
patent: 4161024 (1979-07-01), Joyce et al.
patent: 4181935 (1980-01-01), Feeser et al.
patent: 4181937 (1980-01-01), Hattori et al.
patent: 4195342 (1980-03-01), Joyce et al.
patent: 4228503 (1980-10-01), Waite et al.
patent: 4313161 (1982-01-01), Hardin et al.
patent: 4322795 (1982-03-01), Lange et al.
patent: 4345309 (1982-08-01), Arulpragasam et al.
patent: 4395753 (1983-07-01), Comfort et al.
patent: 4410944 (1983-10-01), Kronies
IBM Tech. Discl. Bull., vol. 15, No. 11, Apr. 1973; "Attached Support Processor w/Shared Cache and Execution Unit", by M. S. Schmookler, pp. 3463-3464.
IBM Tech. Discl. Bull., vol. 21, No. 6, Nov. 1978; "Data Processing System with Second Level Cache", pp. 2468-2469; by F. J. Sparacio.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multiprocessing system including a shared cache does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiprocessing system including a shared cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiprocessing system including a shared cache will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-118694

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.