Multiported cache and systems

Details Multiported cache and systems Multiported cache and systems

1992-07-16

1997-12-09

Chan, Eddie P.

Static information storage and retrieval

Magnetic bubbles

Guide structure

395458, 395467, 395455, 395453, 395472, 36523005, G06F 1208

Patent

active

056969350

ABSTRACT:
A cache memory is provided with a plurality of address ports and a corresponding plurality of tag ports for use with multiple pipes in a pipelined system. One of the address ports is dedicated to snooping and the remaining address ports provide concurrent access to the cache for references to one or more independent addresses respectively issued by one or more pipes. A tag port is provided for each of the address ports to provide concurrent hit/miss status for each address.

REFERENCES:
patent: 4782441 (1988-11-01), Inagami et al.
patent: 5056002 (1991-10-01), Watanabe
patent: 5163140 (1992-11-01), Stiles et al.
patent: 5228135 (1993-07-01), Ikumi
patent: 5274790 (1993-12-01), Suzuki

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