Multiport non-blocking high capacity ATM and packet switch

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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Details

C370S352000, C709S253000

Reexamination Certificate

active

06721310

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to telecommunications. More particularly, the invention relates to a multiport non-blocking high capacity ATM and packet switch.
2. State of the Art
The first commercial digital voice communications system was installed in 1962 in Chicago, Ill. The system was called “T1” and was based on the time division multiplexing (TDM) of twenty-four telephone calls on two twisted wire pairs. The T1 system is still widely used today and forms a basic building block for higher capacity communication systems including T3 which transports twenty-eight T1 signals. The designations T1 and T3 were originally coined to describe a particular type of carrier equipment. Today T1 and T3 are often used to refer to a carrier system, a data rate, and various multiplexing and framing conventions. It is more accurate to use the designations “DS1” and “DS3” when referring to the multiplexed digital signal carried by the T1 and T3 carriers, respectively.
Today, another higher bandwidth TDM system is in use. This system is referred to as the synchronous optical network (SONET) or, in Europe, the synchronous digital hierarchy (SDH). The SONET network is designed to provide enormous bandwidth. SONET signals are referred to as Synchronous Transport Signals (STS) or Optical Carriers (OC). The narrowest SONET signal is referred to as STS-1 or OC-1. It has a bandwidth of 51.84 Mb/s which is sufficient to carry twenty-eight DS1 signals or a single DS3 signal. The hierarchy includes STS-3 (OC-3) which is three times the bandwidth of an STS-1 (OC-1) signal, and higher bandwidth signals increasing in multiples of four, i.e. STS-12 (OC-12), STS-48 (CC-48), STS-192 (OC-192), and STS-768 (OC-768).
The T1 and T3 networks were originally designed for digital voice communication. In a voice network minor bit errors can be tolerated as a small amount of noise. However, in a data network, a minor bit error cannot be tolerated. In the early 1970s, another technology was deployed to support data networks. The technology was called “packet switching”. Unlike the T1 and T3 networks, packet switching was designed for data communications only. In packet switching, a “packet” of data includes a header, a payload, and a cyclic redundancy check (CRC). The header includes addressing information as well as an indication of the length of the payload. The payload contains the actual data which is being transmitted over the network. The CRC is used for error detection. The receiver of the packet performs a calculation with the bits in the packet and compares the result of the calculation to the CRC value. If the CRC value is not the same as the result of the calculation, it means that the packet was damaged in transit. According to the packet switching scheme, the damaged packet is discarded and the receiver sends a message to the transmitter to resend the packet. One popular packet switching scheme for wide area networks (WANs), known as X.25, utilizes a packet which has a fixed payload of 128 octets. Other packet switching schemes allow variable length packets up to 2,000 octets. Frame Relay is an example of a WAN packet switching scheme which utilizes variable sized packets and Ethernet is an example of a local area network (LAN) packet switching scheme which utilizes variable sized packets.
Concurrent with the development of packet switching several groups around the world began to consider standards for the interconnection of computer networks and coined the term “internetworking”. The leading pioneers in internetworking were the founders of ARPANET (the Advanced Research Projects Network). ARPA, a U.S. Department of Defense organization, developed and implemented the transmission control protocol (TCP) and the internet protocol (IP). The TCP/IP code was dedicated to the public domain and was rapidly adopted by universities, private companies, and research centers around the world. An important feature of IP is that it allows fragmentation operations, i.e. the segmentation of packets into smaller units. This is essential to allow networks which utilize large packets to be coupled to networks which utilize smaller packets. Today, TCP/IP is the foundation of the Internet. It is used for email, file transfer, and for browsing the Worldwide Web. It is so popular that many organizations are hoping to make it the worldwide network for all types of communication, including voice and video.
Perhaps the most awaited, and now fastest growing technology in the field of telecommunications is known as Asynchronous Transfer Mode (ATM) technology. ATM was originally conceived as a carrier of integrated traffic, e.g. voice, data, and video. ATM utilizes fixed length packets (called “cells”) of 53 octets (5 octets header and 48 octets payload). ATM may be implemented in either a LAN or a WAN.
Current ATM service is offered in different categories according to a user's needs. Some of these categories include constant bit rate (CBR), variable bit rate (VBR), unspecified bit rate (UBR), and available bit rate (ABR). CBR service is given a high priority and is used for streaming data such as voice and video where a loss of cells would cause a noticeable degradation of the stream. UBR and ABR services are given a low priority and are used for data transfers such as email, file transfer, and web browsing where sudden loss of bandwidth (bursty bandwidth) can be tolerated. ATM service is sometimes referred to as “statistical multiplexing” as it attempts to free up bandwidth which is not needed by an idle connection for use by another connection.
ATM switches (like other packet switches) typically include multiple buffers, queues, or FIFOs for managing the flow of ATM cells through the switch. Generally, a separate buffer is provided for each outlet from the switch. However, it is also known to have separate buffers at the inlets to the switch. Buffer thresholds are set to prevent buffer overflow. If the number of cells in a buffer exceeds the threshold, no more cells are allowed to enter the buffer. Cells attempting to enter a buffer which has reached its threshold will be discarded.
Within the ATM technology, a commonly used interface specification for passing ATM cells between chips on a circuit board is the UTOPIA interface. The UTOPIA interface is specified in ATM Forum standard specification af_phy

0039.000 (UTOPIA Level 2, Version 1, June 1995) which is hereby incorporated by reference herein in its entirety. The present UTOPIA standard defines an interface between a so-called PHY (physical) device and an ATM device for the transfer of fixed length ATM cells. According to the UTOPIA standard, the PHY device is responsible for performing cell-delineation (via the header error correction (HEC) code) and for (de)scrambling the cell payload of the ATM cells. The PHY device may also perform lower level framing functions, for example, SONET framing. The ATM device is responsible for higher level functions such as buffering and scheduling ATM cells and SAR.
Today, SONET, ATM, and IP are converging to provide consumers and businesses with multiple telecommunications services such as multimedia conferencing, video on demand, and high speed Internet access. Moreover, because of changes in the regulation of the telecommunications companies, many companies now compete to provide the same or similar services. Given the number of competing companies and the amount of bandwidth sought, an increasingly large number of physical switches are in use.
In order to lower the costs associated with providing telecommunications services, it is desirable to create broadband switching components which are smaller in size.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a high capacity switch on a single chip.
It is also an object of the invention to provide a high capacity switch on a single chip which has multiple UTOPIA Level 2 ports on the chip.
It is another object of the invention to provide a high capacity switch which is non-blocking.
It is still another obje

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