Multiport memory bypass under software control

Details Multiport memory bypass under software control Multiport memory bypass under software control

1991-02-11

1994-05-17

Lall, Parshotam S.

395375, 395500, 395400, 395DIG1, G06F 1200, G06F 900

Patent

active

053135512

ABSTRACT:
A program-controlled processing device includes a multiport memory circuit providing a plurality of storage locations. First and second data ports of the memory circuit provide parallel access to different locations in accordance with first and second addresses encoded in the program instructions. Bypass means is provided for coupling the second data port to the first data port to simulate parallel access to the same location when desired. The bypass means is controlled directly by the program instructions, by means of a separate bypass control field or by a special value of one of the two addresses. There is thus no need for a run-time comparison of addresses before each memory access, leading to a faster operation of the memory circuit.

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