Multiport memory and method

Details Multiport memory and method Multiport memory and method

1994-11-21

1996-12-17

Nelms, David C.

Static information storage and retrieval

Interconnection arrangements

365206, 365149, 365226, G11C 506

Patent

active

055860729

ABSTRACT:
Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.

REFERENCES:
patent: 4922459 (1990-05-01), Hidaka
patent: 5060189 (1991-10-01), Ota
patent: 5287322 (1994-02-01), Rastegar
patent: 5418737 (1995-05-01), Tran

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