Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Utility Patent
1997-12-18
2001-01-02
Vu, Huy D. (Department: 2733)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
Utility Patent
active
06169742
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a data network switch and, more particularly, to media access control layer communication between the switch and an external management agent.
BACKGROUND ART
A multiport data network switch conventionally permits data communication among a plurality of media stations in a local area network. Each station in the network is associated with a port of the switch. Data frames, or packets, are transferred between stations by means of data network switch media access control (MAC) circuitry, or “engines,” for each switch port. The network switch passes data frames received from a transmitting station to a destination station based on the header information in the received data frame. The switch can link the network to other networks through a router connected to one or more switch ports.
Media access typically is controlled by the respective MAC in accordance with the Simplified Network Management Protocol (SNMP) standard. Physical (PHY) layer devices are coupled between the switch port MACs and the network media. These devices include conventional analog transceivers and the like supporting circuitry. The network stations similarly are equipped with media access control (MAC) engines that are coupled to the network media through PHY devices. The MAC circuitry for each switch port must resolve contentions for traffic communication and data collisions among network stations. Data transmission collisions are possible where stations operate in half-duplex mode. The ISO 8802 (IEEE/ANSI 802.3) Standard specifies a carrier-sense multiple access with collision detection (CSMA/CD) interface to listen for traffic on the media.
Collision is detected by the physical (PHY) layer devices, which generate collision signals to be reported to the MAC engines. This functionality can be performed both at the network station end and at the switch ports. Detection of collision will cause the transmission of data to be re-scheduled to a time determined by a random backoff algorithm specified by the ISO Standard. Thus, at the end of enforcing a collision, the CSMA/CD sublayer delays before attempting to re-transmit the frame.
Typically, a standard seven wire inverted serial interface is provided between a MAC engine and the PHY devices.
FIG. 1
is a block diagram of a basic two station network, depicting the interface between the MAC and PHY at each station. The TXC line is a free running clock signal provided by the MAC to strobe out serial NRZ (Non-Return to Zero) transmit data. The TXE line indicates valid transmit data from the MAC and frames an entire packet. The TXD line transmits serial NRZ data from the MAC. The data is sampled on the rising edge of the transmit clock pulses. RXD line carries serial NRZ data sent to the MAC. The RXC line carries a clock signal to which the serial NRZ receive data is synchronized. The CRS line is a carrier sense line that, in half-duplex mode, indicates valid data on the RXD line; in full-duplex mode, the CRS line indicates valid receive data and frames the entire packet. The COL line indicates detection of a collision condition by the PHY device.
Collision is detected by monitoring the data line by the PHY devices. The NRZ format is a binary encoding scheme in which ones and zeroes are represented by opposite and alternating high and low voltages and where there is no return to zero. The simultaneous application of opposite voltages to a half-duplex data line will yield a zero voltage, indicative of a collision. The PHY device then generates a collision signal, output to the MAC on the COL line. The above described interface between MAC engine and PHY device is typically present at each station network media coupling, as well as at each switch data communication port.
As data networks become more robust, the demand grows for a greater number of switch ports and the capacity to handle the increase in network stations and density of data traffic. The resulting operational complexities impose challenges to the design of semiconductor hardware. With expanding switch functionalities, the need exists for an external management capability to share control of overall switch operations. Such feature would require communication between a MAC in the switch and a MAC in the external management entity. Provision of PHY devices for each of these MACs to handle transmission of data and the collision detection and signaling functionalities would complicate system architecture with considerable additional analog hardware devices.
DISCLOSURE OF THE INVENTION
The present invention addresses the above noted needs and drawbacks of current network switches in part by providing an integrated multiport switch (IMS) having a management port for direct communication with an external management agent. The switch, which is integrated into a single chip, includes a management interface that comprises logic circuit elements. This interface acts as a virtual physical layer for both the MAC at the management port and the MAC at the external management agent. The latter may be located on the same circuit board as the IMS chip. The invention thus provides the advantage of eliminating PHY devices for these MACs while maintaining the collision signal and carrier sense signal generation functions.
A further advantage of the present invention is that the PHY devices are replaced by a logic interface while permitting use of the standard SNMP software for the interfacing operations. No modification of MAC software would be required. This result is in contrast with the substantial software revision that would be required if communication between the IMS MAC and the external MAC were to take place through the PCI bus.
An additional advantage of the management port arrangement of the present invention is that dedication of a switch communication port for external MAC management control is avoided. The number of switch ports available for network communication is thus maximized.
Additional advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the invention is shown and described, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
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Chow Peter Ka-Fai
Runaldue Thomas J.
Advanced Micro Devices , Inc.
Kwoh Jasper
Vu Huy D.
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