Multipoint pipeline processor for computing the discrete fourier

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G06F 15332

Patent

active

042989507

ABSTRACT:
A pipeline processor of a radix-2 configuration including an input, intermediate and output processing sections for performing a discrete Fourier transformation (DFT) of an input array of N signal values to derive an output array of at least N signal values representative of the frequency transformation of the input array is disclosed. The input and output processing sections include first and second pluralities of cascadedly coupled computational elements respectively, which are governed to perform computations in a pipeline fashion and to propagate resulting interelement computed signal values through the input section in a first predetermined signal flow pattern and through the output section in a second predetermined signal flow pattern to render respectively a first intermediate array and the output array of signal values. All of the multiplication processing is concentrated in the intermediate section which multiplies each of the signal values of the first intermediate array with predetermined transformation values respectively associated therewith to generate a second intermediate array of signal values which is input to the output processing section. Accordingly, the signal values of the input, first and second intermediate and output arrays are input, processed and output through top and bottom rails of the three sections of the pipeline processor sequentially in respectively corresponding predetermined orders of coupled pairs.

REFERENCES:
patent: 3777131 (1973-12-01), Llewellyn
patent: 4058715 (1977-11-01), Nina
patent: 4138730 (1979-02-01), Ali
patent: 4156920 (1979-05-01), Winograd
patent: 4164021 (1979-08-01), Nishitani et al.

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