Multiplying digital-to-analog converter

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Patent

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Details

341154, H03M 178

Patent

active

052549933

ABSTRACT:
A multiplying digital-to-analog converter which includes an R-2R chain network is characterized in that, for partial or complete potential equalization, the chain network for an n-bit-wide digital signal applied to the converter comprises (n+m) connection points, where n,m are natural integers greater than zero, the connection point (n+m) produces the output signal of the converter. A first current mirror is provided which produces a constant first current that can be switched to the individual connection points (1+m) to (n+m). The least significant bit of the digital signal is allocated to the connection point (1+m) and the most significant bit to the connection point (n+m) and the first current is switched only to those connection points whose allocated bit has a first state. A second current mirror is provided which produces a constant second current that is larger than that of the first current mirror and can be switched to the individual connection points 1 to n, while the least significant bit is allocated to the connection point 1 and the most significant bit to the connection point n, the second current is switched only to those connection points whose allocated bit has a second state.

REFERENCES:
patent: 4595912 (1986-06-01), Hoehn
patent: 4982192 (1991-01-01), Murooka
patent: 5119094 (1992-06-01), Brokaw
patent: 5128674 (1992-07-01), Kong et al.

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