Multiplying circuit

Details Multiplying circuit Multiplying circuit

1983-08-10

1986-07-01

Thomas, James D.

Boots, shoes, and leggings

364745, G06F 752, G06F 738

Patent

active

045983828

ABSTRACT:
A multiplying circuit comprises an array circuit for producing a product of a multiplicand and multiplier by adding respective partial products together each of a multiplicand in each bit and a multiplier in each bit. The array circuit produces only an (n+1) or more bits of the product, where n denotes a positive integer which is not greater than the bit number of the multiplicand and the bit number of the multiplier. The multiplying circuit comprises a circuit for producing a binary compensation signal representing an integral value closest to a real number given by

REFERENCES:
patent: 3947670 (1976-03-01), Irwin et al.
patent: 4041297 (1977-08-01), Jesse
patent: 4475167 (1984-10-01), Chen
De Mori et al., "A Special-Purpose Computer for Digital Signal Processing", IEEE Trans. on Computers, vol. c-24, No. 12, pp. 1202-1211, Dec. 1975.
Gibson et al., "Synthesis and Comparison of Two's Complement Parallel Multipliers", IEEE Trans. on Computers, vol. c-24, No. 10, pp. 1020-1027, Oct. 1975.
Jump et al., "Effective Pipelining of Digital Systems", IEEE Trans. on Computers, vol. c-27, No. 9, pp. 855-865, Sep. 1978.
Nakamura et al., "A Digital Signal Processing LSI," Digest of Technical Papers IEEE Int. Solid-State Circuits Conference 1982, pp. 30-31, 193-6530/82, Feb. 10, 1982.
Mogar et al., "Digital Signal Processor," Digest of Technical Papers, IEEE Int. Solid State Circuits Conference 1982, pp. 32-33, 193-6530/82, Feb. 10, 1982.

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