Multiply execution unit that includes 4:2 and/or 5:3...

Details Multiply execution unit that includes 4:2 and/or 5:3... Multiply execution unit that includes 4:2 and/or 5:3...

2008-05-13

2008-05-13

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S629000

Reexamination Certificate

active

10891978

ABSTRACT:
A multiply execution unit that can generate the integer product of a multiplicand and a multiplier and is also operable to generate the XOR product of the multiplicand and the multiplier. The multiply execution unit includes a summing circuit for summing a plurality of partial products. The summing circuit includes a plurality of rows. The summing circuit can generate an integer sum of the plurality of partial products and can generate an XOR sum of the plurality of partial products. The summing circuit includes a plurality of compressors in the first row of the summing circuit. The plurality of compressors each has more than three inputs that receive data, a carry output, and a sum output.

REFERENCES:
patent: 5944776 (1999-08-01), Zhang et al.
patent: 6349318 (2002-02-01), Vanstone et al.
patent: 6434586 (2002-08-01), Carlson et al.
U.S. Appl. No. 10/354,354, filed Jan. 30, 2003, Rarick et al.
U.S. Appl. No. 10/317,752, filed Dec. 12, 2002, Spracklen et al.
Satoh and Takano, A Scalable Dual-Field Elliptic Curve Cryptographic Processor, Apr. 2003, IEEE Transactions on Computers, vol. 52, No. 4.

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