Multiplier with selectable booth encoders for performing 3D grap

Details Multiplier with selectable booth encoders for performing 3D grap Multiplier with selectable booth encoders for performing 3D grap

1996-11-22

1999-08-10

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

208 629, G06F 738, G06F 752

Patent

active

059351985

ABSTRACT:
A multiplier array is modified to perform interpolations. The interpolations use a normalized first operand A between 0 and 1. The interpolation is the function B * A+C * (1-A). Standard multipliers accept two operands as inputs, but interpolations require 3 operands (A, B, C). The AND gates in Booth encoders in a standard multiplier array are replaced by multiplexers. Each multiplexer selects a bit from one of the two operands (B or C) based on a bit of the first operand A. The interpolate operation multiplies the first operand A by the second operand B while simultaneously multiplying the bit-wise inverse of the first operand A' by the third operand C. Since one multiply is with the first operand A while the second multiply is with the inverse A' of the first operand, one of the multiplies always generates zero while the other multiply generates either a one or a zero for each bit of the first operand. The multiply producing zero is deleted by not being selected by the multiplexer; instead the multiplexer selects the other multiply as an intermediate product term. Thus the intermediate product terms for the half of the inputs which generate a zero product term are never generated. A correction term is generated and added in to account for the difference between the bit-wise inverse of A and the two's complement of A. The multiplexers can be enlarged to allow either standard 2-operand multiplies or 3-operand interpolations in the same multiplier array. The interpolator-multiplier is especially useful for 3D graphics applications.

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"3D For Free", Jeff Mace, PC Magazine, Dec. 3, 1996, pp. 259-276.

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