Multiplier, especially a serial bit multiplier, free from intern

Details Multiplier, especially a serial bit multiplier, free from intern Multiplier, especially a serial bit multiplier, free from intern

1994-05-09

1996-04-23

Envall, Jr., Roy N.

Boots, shoes, and leggings

364754, G06F 752

Patent

active

055110185

ABSTRACT:
A multiplier for least significant bit first multiplication of a multiplicand coded on n bits by a multiplier coefficient includes a processor which, for each bit of the decimal part of the multiplier coefficient between the least significant bit and the most significant bit, calculates the sum of rank n+1 obtained from partial products of the bit in question with the n bits of the multiplicand and from corresponding sums calculated for the preceding bit or bits of the multiplier coefficient. This prevents internal overflow of the multiplier.

REFERENCES:
patent: 3956622 (1976-05-01), Lyon
patent: 4346451 (1982-08-01), Katayama
patent: 5103419 (1992-04-01), Toyokura et al.
K. Pekmestzi et al. "Cellular two's complement serial-pipeline multipliers", Nov. 1979 pp. 575-580 (Radio Electronic Engineer, vol. 49, No. 11, GB).
R. Lyon, "Concise Papers", Apr. 1976, pp. 418-425 (IEEE Transactions on Communications).

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