Multiplier-divider having error offset function

Details Multiplier-divider having error offset function Multiplier-divider having error offset function

2011-03-15

2011-03-15

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical analog calculating computer

Particular function performed

C323S207000

Reexamination Certificate

active

07908310

ABSTRACT:
A multiplier-divider capable of offsetting errors includes a plurality of multiplication and division units to perform processes and arrangements so that errors generated by signals passing through the multiplier-divider are offset. As a result impact of the errors is reduced. More than one processing signal can be obtained from the same power supply to reduce loss of external sampling.

REFERENCES:
patent: 5960207 (1999-09-01), Brown
patent: 6744241 (2004-06-01), Feldtkeller
patent: 6812769 (2004-11-01), Yang et al.
patent: 7057440 (2006-06-01), Yang et al.
patent: 7400517 (2008-07-01), Allinder

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