Multiplier core circuit using quadritail cell for low-voltage op

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

327356, 327563, 455333, G06F 744

Patent

active

058314687

ABSTRACT:
A multiplier core circuit using four transistors, in which a novel input voltage combination is adopted. This circuit contains first, second, third and fourth bipolar transistors or field-effect transistors whose emitters or sources are coupled together. Collectors or drains of the first and second transistors are coupled together to form an output end and collectors or drains of the third and fourth transistors are coupled together to form the other output end. An output signal of the circuit is differentially taken out from the output ends. The first to fourth transistors are applied with first to fourth voltages at their base or +(1/2)V.sub.y !, respectively. These four voltages may be (V.sub.x -V.sub.y), 2V.sub.x, V.sub.x and (2V.sub.x -V.sub.y), respectively. If a, b and c are positive constants, these four voltages may be expressed as

REFERENCES:
patent: 4388540 (1983-06-01), Schreurs
patent: 5107150 (1992-04-01), Kimura
patent: 5151624 (1992-09-01), Stegherr et al.
patent: 5187682 (1993-02-01), Kimura
patent: 5438296 (1995-08-01), Kimura
patent: 5523717 (1996-06-01), Kimura
patent: 5552734 (1996-09-01), Kimura
patent: 5576653 (1996-11-01), Kimura
patent: 5578965 (1996-11-01), Kimura
patent: 5581210 (1996-12-01), Kimura
K. Bult et al., "A CMOS Four-Quadrant Analog Multiplier", IEEE Journal of Solid-State Circuits, vol. SC-21, No. 3, Jun. 1986, pp. 430-435.
Z. Wang, "Novel Linearisation Technique for Implementing Large-Signal MOS Tunable Transconductor", Electronics Letters, vol. 26, No. 2, Jan. 18, 1990, pp. 138-139.
P. Wu et al., "Tunable Operational Transconductance Amplifier With Extremely High Linearity Over Very Large Input Range", Electronics Letters, vol. 27, No. 14, Jul. 4, 1991, pp. 1254-1255.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multiplier core circuit using quadritail cell for low-voltage op does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiplier core circuit using quadritail cell for low-voltage op, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplier core circuit using quadritail cell for low-voltage op will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-693673

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.