Multiplier based on a variable radix multiplier coding

Details Multiplier based on a variable radix multiplier coding Multiplier based on a variable radix multiplier coding

1996-11-27

1998-10-27

Ngo, Chuong Dinh

Boots, shoes, and leggings

364746, G06F 738, G06F 752

Patent

active

058285903

ABSTRACT:
A modular multiplication method and device is based on RSD arithmetic, partial product reduction techniques and precomputation techniques. During multiplication, redundant representation is adopted to carry out addition of two large numbers (512 bits or longer) without carry propagation. A multiplication based on variable radix multiplier coding is performed by coding y.sub.i into a radix.sub.-- 8 digit y.sub.j, except when y.sub.j =.+-.3, in which case y.sub.i is coded into a radix.sub.-- 4 digit y.sub.j. This modular multiplication method is used for VLSI implementation of many public-key cryptosystems, such as RSA.

REFERENCES:
patent: 4528641 (1985-07-01), Burrows
patent: 4965762 (1990-10-01), Williams
patent: 5107451 (1992-04-01), Houk
patent: 5150322 (1992-09-01), Smith et al.
patent: 5297206 (1994-03-01), Orton
"A Method for Obtaining Digital Signatures and Public Key Cryptosystems," by Rivest et al., MIT Laboratory for Computer Science and Department of Mathematics (Feb. 1978). pp. 120-126.

Affiliated with

Also associated with

Rating

Multiplier based on a variable radix multiplier coding does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiplier based on a variable radix multiplier coding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplier based on a variable radix multiplier coding will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1619100