Multiplier-accumulator block mode splitting

Details Multiplier-accumulator block mode splitting Multiplier-accumulator block mode splitting

2004-02-20

2008-10-14

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07437401

ABSTRACT:
A programmable logic device is provided that includes a MAC block having mode splitting capabilities. Different modes of operation may be implemented simultaneously whereby the multipliers and other DSP circuitry of the MAC block may be allocated among the different modes of operation. For example, one multiplier may be used to implement a multiply mode while another two multipliers may be used to implement a sum of two multipliers mode.

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Beuchat J, Tisserand A; “Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices” FLP 2002, LNCS 2438, 2002, pp. 513-552.

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