Multiplier

Electrical computers: arithmetic processing and calculating – Electrical analog calculating computer – Particular function performed

Reexamination Certificate

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Details

C327S356000

Reexamination Certificate

active

07024448

ABSTRACT:
A multiplier having a simple constitution, excellent performance with respect to high-frequency characteristics and distortion characteristics, and allows low-voltage operation. Transistor Q11, resistors R11and R12form a common-emitter circuit. One signal of differential signal v1is amplified by the common-emitter circuit, and the amplified signal is input to an emitter follower composed of transistor Q12. The output current of the emitter follower is input through resistor R13into the current mirror circuit composed of transistors Q13and Q14. Output current I5of said current mirror circuit is input to the transistor pair of transistor Q19and npn transistor Q20. By selecting an appropriate gain for the common-emitter circuit, currents I5and I6generated in this way become independent of the base-emitter voltage, and performance is improved with respect to distortion characteristics.

REFERENCES:
patent: 4764892 (1988-08-01), Thomas
patent: 5877974 (1999-03-01), Can
patent: 5926408 (1999-07-01), Kimura
patent: 5931899 (1999-08-01), Kertis
patent: 2001/0048336 (2001-12-01), Amano

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