Multiplier

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Combining of plural signals

Reexamination Certificate

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Details

C327S356000

Reexamination Certificate

active

07321253

ABSTRACT:
A conventional multiplier which uses a MOS transistor has a subject that, in order to compensate for a variation of a bias voltage or the like, it is necessary to add a complicated correcting circuit to an outputting section or the like, and the circuit scale becomes great and the power consumption increases. A multiplier includes NMOS transistors (3, 4, 5) and constant voltage sources (6, 9, 12) connected to the gates of the NMOS transistors (3, 4, 5), respectively, and the voltage value of a constant voltage source (9) and the voltage value of another constant voltage source (12) are set equal to each other. Further, the NMOS transistor (4) and the NMOS transistor (5) are formed same as each other.

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patent: 6466775 (2002-10-01), Franca-Neto
patent: 6469564 (2002-10-01), Jansen
patent: 6573760 (2003-06-01), Gabara
patent: 5-46792 (1993-02-01), None
patent: 8-50625 (1996-02-01), None

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