Multiplication remainder calculator

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07472154

ABSTRACT:
In a circuit which adds a partial product {Σ(Aj*B)*2^j (j=0, . . . , m−1)} to a provisional remainder u by using a value of inferior m bits (m is an integer not less than 2) of a number to be multiplied A and a multiplier factor B, there is provided a multiplication remainder calculator which shifts inferior m bits of a provisional remainder u by continuously connecting m stages of processing circuits which perform addition of a modulus N and one-bit shift, and calculates a Montgomery product of the number to be multiplied A and the multiplier factor B by repeating this processing, wherein a multiple number of the multiplier factor can be calculated by inhibiting one-bit shift of the processing circuits.

REFERENCES:
patent: 5448639 (1995-09-01), Arazi
patent: 6321247 (2001-11-01), Matthews et al.
patent: 6415310 (2002-07-01), Takenaka et al.
patent: 6973470 (2005-12-01), Takahashi et al.
patent: 2003/0031316 (2003-02-01), Langston et al.
patent: 2003/0033340 (2003-02-01), Asami
patent: 2003/0182340 (2003-09-01), Horie
patent: 11-212951 (1999-08-01), None
patent: 2002-007112 (2002-01-01), None
Cetin et al., Montgomery Multiplication in GF(2k), Apr. 1998, Kluwer Academic Publishers, Boston Manufactured in The Netherlands, pp. 57-69.
Related U.S. Appl. No. 10/235,541, filed Sep. 6, 2002.

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