Boots – shoes – and leggings
Patent
1990-11-19
1992-08-25
Nguyen, Long T.
Boots, shoes, and leggings
G06F 752
Patent
active
051424908
ABSTRACT:
The multiplication circuit is formed in such a manner that the intermediate sums of partial products are divided into a lower places group and a higher places group and the operations for obtaining the products of the lower places group alone of the intermediate sums already found are carried out parallel to the processing for obtaining the higher places group of the intermediate sums to obtain the higher products thereafter, noting to the fact that the intermediate sums of partial products are found sequentially from lower places to higher places. By adopting such an arrangement, the operations for obtaining the higher places group of the intermediate sums can be processed in parallel with the operations for obtaining the products of the lower places group of the intermediate sums already found, and the higher products are found thereafter. Therefore, the time required for the former-stage processing and that required for the latter-stage processing can be made more uniform.
REFERENCES:
patent: 4736335 (1988-04-01), Barkan
patent: 4791601 (1988-12-01), Tanaka
patent: 4831577 (1989-05-01), Wei et al.
patent: 4887233 (1989-12-01), Cash et al.
S. Waser et al., "Real Time Processing Gains Ground with Fast Digital Multiplier", Electronics, Sep. 29, 1977, pp. 93-99.
Sakashita Kazuhiro
Tsujihashi Yoshiki
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Long T.
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