Multiplex communications – Pathfinding or routing – Through a circuit switch
Patent
1997-08-15
2000-03-07
Nguyen, Chau
Multiplex communications
Pathfinding or routing
Through a circuit switch
370395, H04L 1256
Patent
active
060349549
ABSTRACT:
For reducing the scale of a multiplexer, a lower speed ATM interface block, an interface block for SDT mode circuit emulation, and an interface block for UDT mode circuit emulation perform processing for terminating services provided by lower speed transmission lines accommodated therein, and part of AAL processing, which is pre-processing depending on a service, for generating ATM cells from signals received by a terminated service, and send the processed signal to a higher speed line interface using a previously assigned time slot on a time-division bus. The higher speed line interface once stores the signals received from the time-division bus in a buffer, and subsequently performs certain processing including a common portion for respective signals for generating therefrom ATM cells in which the signals are stored in payloads. The generated ATM cells are multiplexed and transmitted onto a higher speed transmission line.
REFERENCES:
patent: 5535197 (1996-07-01), Cotton
Murakami Masaru
Nakayama Kaori
Takase Akihiko
Takatori Masahiro
Toyama Takaaki
Hitachi , Ltd.
Nguyen Chau
Wilkow Frederic D.
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