Multiplexing A/D converter having sweep interrupt function

Coded data generation or conversion – Analog to or from digital conversion – Multiplex

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341155, H03M 112

Patent

active

052124835

ABSTRACT:
An A/D converter comprising a plurality of inputs, an input selection array to select one of the input signals, an A/D circuit providing a digital output and a conversion completion signal, a counter for sweeping a contiguous subset of the input channels sequentially, the counter incrementing once each time the conversion completion signal is asserted and resetting to point to the first channel in the subset after reaching the last channel in the subset, a channel memory for storing the value of the counter while an optional channel is selected for conversion without regard to the present position of the sweeping counter, a return bus, activated by the conversion completion signal, for replacing the value of the counter after the optional conversion is complete and returning to the normal sweep sequence in the previous position in the sequence, thereby avoiding useless conversion operations.

REFERENCES:
patent: 4654632 (1987-03-01), Yoshida et al.
patent: 4742515 (1988-05-01), Dabholker et al.
patent: 4933676 (1990-06-01), Hauge et al.
Short, Kenneth L., "Microprocessors and Programmed Logic", Prentice-Hall, Englewood Cliffs, N.J., 1981, pp. 294-297.

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