Multiplexer with inhibit for ECL gate array

Details Multiplexer with inhibit for ECL gate array Multiplexer with inhibit for ECL gate array

1985-12-12

1987-08-11

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

307243, 328104, H04J 304, H03K 1776

Patent

active

046866744

ABSTRACT:
A multiplexer with inhibit is implemented so that an active inhibit signal effectively sets the select signals to block all but the selected input signal and effectively masks the selected input signal. In the case of the disclosed emitter-coupled logic 4:1 multiplexer, enable signal controlled transistors (Q24 and Q25) are in parallel with transistors (Q14 and Q15) respectively controlled by the select signals (S0 and S1). Activating the enable signal (EN) effectively selects one input (A3) and blocks the others (A0, A1 and A2). A third enable activated transistor (Q35) is in parallel with the transistor (Q13) controlled by the selected input (A3). The activated enable masks the selected signal to complete the inhibit function. Thus, a standard function is implemented with a reduced free-standing and total transistor count.

REFERENCES:
patent: 4524443 (1985-06-01), Crocker et al.
patent: 4593390 (1986-06-01), Hildebrand et al.
patent: 4616358 (1986-10-01), Rehm et al.

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