Multiplexer for multiple media streams

Details Multiplexer for multiple media streams Multiplexer for multiple media streams

1997-08-01

2001-02-13

Vu, Huy D. (Department: 2735)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S468000, C370S474000, C370S533000

Reexamination Certificate

active

06188703

ABSTRACT:

FIELD
The present invention relates to a method and apparatus for implementing and multiplexing multiple media streams in accordance with IOC/AEC 13818-1 MPEG-2 systems standard.
BACKGROUND
A multimedia system provides end-to-end service delivery by bundling high speed multimedia streams for transmission over ATM or other networks, unbundling them and using or storing them. Such streams may correspond to video, audio, signals used to control robotic applications, force-feedback applications, agile manufacturing and the like. A typical application may correspond to transmitting video and audio signals over an ATM network to a desired endpoint. The video signals may emanate as a digitized file from a file server or be an external analog video signal as from a camera, laser disc or VCR which must be digitized, compressed and then sent to a network interface (NIC) card for transmission into digital network for eventual reception by another multimedia terminal that would perform the inverse operation of demultiplexing, decoding and sending the decoded video signal to an analog television monitor.
Multimedia signals are typically high-bandwidth and time-sensitive in nature. A suitable compression scheme is, therefore, required such as MPEG-2 (Motion Picture Experts Group) and involves bit-rates in excess of 4 Megabits per second up to as high as 20 Megabits per second. One of the problems when faced with such high bandwidth signals is how to build an inexpensive high-bandwidth multiplexer to packetize and synchronize multiple media streams into one multiplex stream. One could solve the problem by using a very expensive RISC processor to implement the transport stream multiplexing operation but such a solution would not be commercially acceptable.
Accordingly, it is an object of the present invention to provide a multiplexer which uses a low cost microcontroller and programmable logic capable of pre-processing and parsing the bitstream before any processing by the microcontroller.
SUMMARY OF THE INVENTION
According to the invention there is provided a multimedia terminal having a host processor, an encoder and a system time clock. The output of the encoder is in the form of an elementary stream of data which is sent to a multiplexer. The multiplexer includes a mux processor, a FIFO and a mux logic circuit coupled to both the mux processor and the FIFO. The FIFO is operative to buffer the elementary stream of data and the mux logic is operative to preprocess the elementary stream of data in accordance with an encoder/decoder protocol.
The encoder/decoder protocol is preferably an MPEG-2 protocol.
The mux logic circuit monitors FIFO fullness and signals the mux processor when there is sufficient data in the FIFO to form the payload of a transport packet.
The mux logic circuit signals the mux processor when a start-code is in the transport packet payload that it is about to read.
The multiplexer includes a state of frame indicator machine in the mux logic circuit that determines whether a transport packet is to be treated as start of frame data. If that is the case, the mux processor creates a transport layer and an underlying packetized elementary stream (PES) layer. The mux processor creates a special transport packet with an adaptation field to contain a PES header and reads less elementary stream data to compensate for the bytes taken up by the PES header.
The mux logic circuit includes a start code tracking machine coupled to the FIFO operative to track start-codes through the FIFO.
A presentation time stamp (PTS) generator may be operative to latch the system time clock on access unit boundaries and to preformat the PTS in accordance with MPEG-2.
A program clock reference (PCR) time stamp generator may latch the system time clock to a PCR register once a read access is made to this register by the multiplexer.
A presentation time stamp may be inserted into the transport stream when the start of an encoded frame arrives at the mux interface.
The FIFO and mux logic circuit may operate on video elementary stream of data.
The FIFO and mux logic circuit may operate on audio elementary stream of data.
Pre-processing and parsing of the bitstream before arrival at the mux processor significantly reduces the number of operations/second required of the processor.


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