Multiplex communications – Wide area network – Packet switching
Patent
1988-06-27
1990-03-20
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
371 26, H04J 314
Patent
active
049107283
ABSTRACT:
Binary logic states (ONE, ZERO) are presented to the data inputs (24) of a multiplexer in a pattern characterized by a reversal of the binary logic states at input boundaries defined numerically as radix two raised to successive integer exponents. After sequencing the multiplexer address lines (22) to select the inputs to appear at the multiplexer output (25) in a desired sequence, the assembled output word (27) can, because of the pattern presented to the inputs, uniquely identify one of a number of particular address line conditions. Preselected codes are determined that facilitate identification of the conditions by comparing the codes to the output word in a flowchart of program steps (FIG. 4). Each code is associated with a pair of conditions, a first condition with a comparison result of all ONEs and a second with a comparison result of zero.
REFERENCES:
patent: 3579199 (1971-05-01), Anderson et al.
patent: 3920919 (1975-11-01), Aillet
patent: 3940601 (1976-02-01), Henry et al.
patent: 4376998 (1983-03-01), Abbott et al.
patent: 4559626 (1985-12-01), Brown
patent: 4601028 (1986-07-01), Huffman et al.
Shenton, "Custom Design of a High Performance MOST Multiplexer" in Proceedings I.R.E.E. Australia, vol. 32, No. 6; Jun., 1971; pp. 204-213.
Kosakowski Richard H.
Olms Douglas W.
United Technologies Corporation
LandOfFree
Multiplexer diagnostic input patterns does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiplexer diagnostic input patterns, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplexer diagnostic input patterns will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-797598