Multiplexer circuit and analogue-to-digital converter

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

Reexamination Certificate

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Reexamination Certificate

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07031349

ABSTRACT:
A multiplexer circuit (100) has at least two input channels (IN0, IN1) and an output channel (2). Each input channel (IN0, IN1) has a first transmission gate (FT0, FT1) and a second transmission gate (ST0, ST1). The transmission gate can be switched by a select signal (SELECT0, SELECT0; SELECT1, SELECT1) for connecting the input channel (IN0, IN1) to the output channel (2). At least one of the input channels (IN0, IN1) has a bypass circuit for preventing a current flowing through the first transmission gate (FT0, FT1) from reaching the other input channel.

REFERENCES:
patent: 5523713 (1996-06-01), Yukutake et al.
patent: 5742551 (1998-04-01), Yukutake et al.
patent: 5955912 (1999-09-01), Ko
patent: 2 319 128 (1998-05-01), None
patent: 1-236731 (1989-09-01), None

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