Multiplexer and demultiplexer

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Converging with plural inputs and single output

Reexamination Certificate

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Details

C327S408000

Reexamination Certificate

active

07088170

ABSTRACT:
The multiplexer according to the invention comprises a first data input line (TL1) for incoming data (Data1), a second data input line (TL2) for incoming data (Data2), and a data output line (TL3) for outgoing data (Data out). The multiplexer further comprises a control line (20, 21, 22) for applying a control signal (clk) to a first switching means (T1,T3,T5;SR1,SR3,SR5) and a second switching means (T2,T4,T6;SR2,SR4,SR6) for alternatively connecting the first data input line (TL1) over the first switching means (T1,T3,T5;SR1,SR3,SR5) and the second input line (TL2) over the second switching means (T2,T4,T6;SR2,SR4,SR6) to the data output line (TL3), wherein the first and second switching means (T1–T6;SR1–SR6) are spatially arranged in such a way, that the control signal (clk) applied to the first switching means (T1,T3,T5;SR1,SR3,SR5) compared with the control signal (clk) applied to the second switching means (T2,T4,T6;SR2,SR4,SR6) shows a phase shift.

REFERENCES:
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patent: 4985703 (1991-01-01), Kaneyama
patent: 5070255 (1991-12-01), Shin
patent: 5425022 (1995-06-01), Clark et al.
patent: 5744995 (1998-04-01), Young
patent: 5789966 (1998-08-01), Bechade
patent: 5856754 (1999-01-01), Yamashita
patent: 6351152 (2002-02-01), Reddy et al.
patent: 2003/0222674 (2003-12-01), Hachiya
patent: 2003/0234664 (2003-12-01), Yamagata
patent: 0 305 771 (1988-08-01), None

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