Multiplexer

Wave transmission lines and networks – Plural channel systems – Having branched circuits

Reexamination Certificate

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Details

C333S185000

Reexamination Certificate

active

06927648

ABSTRACT:
Four frequency components (f1to f4) (where, f1<f2<f3<f4) are input into a port (10) of a first demultiplexing filter circuit (1), and demultiplexed into low frequency components (f1and f2) and high frequency components (f3and f4), and input in a port (20) of a second demultiplexing filter circuit (2) and a port (30) of a third demultiplexing filter circuit (3), respectively. The frequency components (f1and f2) are demultiplexed into the component (f1) and the component (f2) by the second demultiplexing filter circuit (2), and output from a port (23) and a port (24), respectively. The frequency components (f3and f4) are demultiplexed into the component (f3) and the component (f4) by the third demultiplexing filter circuit (3), and output from a port (33) and a port (34), respectively. The first demultiplexing filter circuit (1) comprises a low-pass filter (11) and a high-pass filter (12), the second demultiplexing filter circuit (2) comprises a low-pass filter (21) and a combined filter (22) of a combination of a low-pass filter and a band elimination filter, and the third demultiplexing filter circuit (3) comprises a combined filter (31) of a combination of a high-pass filter and a band elimination filter and a high-pass filter (32). These demultiplexing filter circuits are formed of a stacked structure.

REFERENCES:
patent: 5021756 (1991-06-01), Tajima et al.
patent: 2003/0125001 (2003-07-01), Kushihi
patent: 58-138415 (1983-09-01), None
patent: 6-90128 (1994-03-01), None
patent: 6-188622 (1994-07-01), None
patent: 10-98348 (1998-04-01), None
patent: 10-117117 (1998-05-01), None
patent: 10-200442 (1998-07-01), None
patent: 11-31905 (1999-02-01), None
patent: 11-168303 (1999-06-01), None

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