Multiplexed synchronization circuits for switching frequency syn

Details Multiplexed synchronization circuits for switching frequency syn Multiplexed synchronization circuits for switching frequency syn

1998-06-01

2000-03-28

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327 44, 327 99, H03L 700

Patent

active

06043693&

ABSTRACT:
Multiplexers are used to generate synchronized slave clocks from a common master clock. A first multiplexer and a second multiplexer generate a first slave clock and a second slave clock, respectively, from the common master clock. A third multiplexer and a fourth multiplexer are configured as a divide-by-n circuit for providing a third slave clock that is a divided version of the second slave clock. A fifth multiplexer provides a matching delay to preserve the synchronization between the first slave clock and the other slave clocks. A sixth multiplexer is used to select between the second slave clock and the third slave clock in response to a select signal. A flip-flop may be used to provide the select signal and to guard against false selection of slave clocks.

REFERENCES:
patent: 5635857 (1997-06-01), Flora
patent: 5767720 (1998-06-01), Osera et al.

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