Multiplexed sigma-delta interface

Details Multiplexed sigma-delta interface Multiplexed sigma-delta interface

2007-09-25

2007-09-25

Patel, Ajit (Department: 2616)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S503000, C370S463000

Reexamination Certificate

active

10464022

ABSTRACT:
An improved digital interface circuit that allows a plurality of data streams and other digital information to be output over a single channel. The digital interface circuit includes a plurality of data inputs, at least one control input, at least one clock input, and a single serial bit output. The digital interface circuit receives respective input data streams at the data inputs, receives digital control information at the control input, and receives a clock signal at the clock input. The control information is an N-bit data stream having a data rate of 1/N times the rate of the input data streams (N≧1). The digital interface circuit generates a frame synchronization signal for providing framing for the N-bit data stream, and time-multiplexes the data and control information over the single serial bit output.

REFERENCES:
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patent: 5886656 (1999-03-01), Feste et al.
patent: 6400295 (2002-06-01), Van Herzeele
patent: 7016447 (2006-03-01), Reuveni
patent: 2006/0083393 (2006-04-01), Richenstein et al.
TLC320AD57C Data Manual, Sigma-Delta Stereo Analog-to-Digital Converter, SLAS086A, Jan. 1995, Texas Instruments, 20 pages.

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