Multiplexed liquid crystal display

Details Multiplexed liquid crystal display Multiplexed liquid crystal display

1981-03-27

1983-07-05

Trafton, David L.

Communications: electrical

Land vehicle alarms or indicators

Internal alarm or indicator responsive to a condition of the...

340784, 340798, 340802, G09G 318

Patent

active

043921299

ABSTRACT:
A multiplexed liquid crystal display arrangement including a back plane (241) driven by a signal (212) derived from a common clock signal (200). The clock signal on the back plane is also provided to one input of an EXCLUSIVE OR gate (245b) the other input of which is the incoming multiplexed data. A second clock signal (211) drives the multiplexing counter (141) which in turn drives the address lines (221) of an analog multiplexer (138). Each segment of a multi-segment liquid crystal display having the common back plane (241) has attached thereto a capacitor (C1 through C64) acting as a temporary storage for the signals. A spike suppression flip-flop (247) is used to disable the multiplexer during changes on the address lines in order to suppress output spikes which occur during such changes. The period of the spike suppression pulse is selected to be short with respect to the on period of each segment in the multiplex timing.

REFERENCES:
patent: 3532813 (1970-10-01), Lechner
patent: 3654606 (1972-04-01), Marlowe et al.
patent: 3787834 (1974-01-01), Elliott
patent: 3824003 (1974-07-01), Koda et al.
patent: 3862360 (1975-01-01), Dill et al.
patent: 4091377 (1978-05-01), Shimoi
patent: 4109242 (1978-08-01), Channin
patent: 4205516 (1980-06-01), Terao
patent: 4236153 (1980-11-01), Aling
patent: 4236155 (1980-11-01), Nagata

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