Multiplexed digital-to-analog converters used in...

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Details

C341S141000

Reexamination Certificate

active

06621437

ABSTRACT:

BACKGROUND
Transceivers in wireless communication devices may utilize Digital-to-Analog Converters (DACs) as building blocks in mixed mode chips. For instance, a signal received from the antenna may be demodulated in the receiver portion of the transceiver and a Programmable Gain Amplifier (PGA) may be used to adjust the amplitude of the demodulated baseband signal. In the transmitter portion, a Power Amplifier (PA) may set the strength of the signal transmitted from the antenna. DACs may be used in the transceiver to provide control signals to the PGAs and PAs to set and adjust the amplitudes of the RF signals used by the RF circuitry. Also, transceivers may use DACs to control the operating frequency of Voltage Controlled Oscillators (VCOs) that may be used in the modulation/demodulation process.
Transceivers designed for the Code Division Multiple Access (CDMA) standard typically incorporate about six to eight DACs while a transceiver designed to the Global System for Mobile Communications (GSM) standard may have four to six DACs. The low-speed, high-resolution DACs convert digital signals into analog signals that may control the PGAs or PAs. DACs are typically designed from transistors, capacitors and resistors. A DAC may incorporate relatively large capacitors that may be obtained from the gate capacitance of transistors or the capacitance between metal layers as fabricated in a Metal Oxide Semiconductor (MOS) process. The resistors in a DAC may be obtained using the resistivity of the polysilicon gate layer or the source/drain diffused regions. Hence, the large capacitors and resistors in DACs may take up silicon area and consume power in converting digital input signals to analog output signals. Thus, there is a need for a wireless communication device to provide an efficient way to implement DACs that may reduce the silicon area and consumed power.


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