Multiplexed buffer

Details Multiplexed buffer Multiplexed buffer

1984-06-27

1985-12-31

Mullins, James B.

Amplifiers

Combined with automatic amplifier disabling switch means

330 86, 330148, 330282, H03F 300

Patent

active

045624054

ABSTRACT:
A buffer is described which includes two gain stages which may be constructed of MOS devices, the first stage having a low noise characteristic and the second stage having a high current drive capability. The second stage is switched in circuit only when high current drive is needed so that the buffer otherwise exhibits the low noise characteristics of the first stage. A feedback network is also switched in circuit in a manner that maintains the buffer's loop gain substantially constant, whether or not the high current drive stage is in circuit.

REFERENCES:
patent: 3399358 (1968-08-01), Rinehart
patent: 3525948 (1970-08-01), Sherer et al.
patent: 3696305 (1972-10-01), Mitchell et al.
patent: 3737798 (1973-06-01), Faraguet et al.
patent: 4066919 (1978-01-01), Huntington
patent: 4085380 (1978-04-01), Williford
patent: 4138649 (1979-02-01), Schaffer
patent: 4152659 (1979-05-01), Gordon
patent: 4337440 (1982-06-01), de Korte

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