Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1995-08-14
1998-03-03
Powell, Mark R.
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
G09G 336
Patent
active
057240604
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the multiplex addressing of ferroelectric liquid crystal displays (FLCDs). Such displays may use a chiral smectic C, I, and F liquid crystal material.
2. Discussion of Prior Art
Liquid crystal display devices commonly comprise a thin layer of a liquid crystal material contained between two glass slides. Electrode structures on the inner faces of these slides enable an electric field to be applied across the liquid crystal layer thereby changing its molecular alignment. Many different types of displays have been made using nematic and cholesteric liquid crystal material. Both these types of material are operated between an electric field ON state and a field OFF state; i.e. displays are operated by switching an electric field ON and OFF Both nematic and cholesteric material respond to the rms value of applied electric field; they are not polarity sensitive.
A more recent type of display uses a ferroelectric chiral smectic C, I, and F liquid crystal material in which liquid crystal molecules adopt one of two possible field ON states depending on the polarity of applied field. These displays are thus switched between the two states by dc pulses of appropriate polarity. In a zero applied field the molecules may adopt an intermediate, configuration depending upon surface alignment treatment. Chiral smectic displays offer very fast switching together with an amount of bistability which depends upon material, liquid crystal material layer thickness, and cell surface alignment processes. Examples of chiral smectic displays are described in G.B. No. 2,163,273; G.B. No. 2,159,635; G.B. No. 2,166,256; G.B. No. 2,157,451; U.S. Pat. No. 4,536,059; U.S. Pat. No. 4,367,924; G.B. P.A. No 86/08,114 - GB 2,209,610 - P.C.T. No. G.B. 87/00,222; G.B. P.A. No 86/08,115 - GB 2,210,468 - P.C.T. No 87/00,221; G.B. P.A. No. 86/08,116 - GB 2,210,469 - P.C.T. 87/00,220.
One known display is formed as an x, y matrix of pixels or display elements produced at the intersections between column electrodes on one wall and row electrodes on the other wall. The display is addressed in a multiplex manner by applying voltages to successive row (x) and column (y) electrodes.
There are a number of known systems for multiplex addressing chiral smectic displays; see for example article by Harada et al 1985 S.I.D. Paper 8.4 pp 131-134, and Lagerwall et al 1985 I.D.R.C. pp 213-221. See also GB 2,173,336-A and GB 2,173,629-A. Multiplex addressing schemes for FLCDs employ a strobe waveform that is applied in sequence down eg a row of electrodes simultaneously with data waveforms applied to eg column electrodes. A characteristic of FLCDs is that they switch on receipt of a pulse of suitable voltage amplitude and length of time of application, ie pulse width, termed a voltage time product V.t. Thus both amplitude and pulse width need to be considered in designing multiplex addressing schemes. To address a large display in a relatively short time requires short pulse widths and a correspondingly high voltage. In a typical display cell the pulse width is 50 to 100 .mu.sec and voltages up to 50 volts need to be switched through drivers circuits to a display.
At present the circuitry for driving a large number of electrodes in a display exists for multiplex addressed nematic devices such as the 90.degree. twisted nematic and the 270.degree. super twisted nematic with their relatively low voltage switching requirements, eg peak voltages of +/-25 volts; see for example H Kawakami, Y Nagae, and E Kaneko, SID Conference Proceedings 1976 pages 50-52. Circuitry capable of handling larger voltage levels are only available with about 64 outputs per circuit chip. Large displays require well over 100 outputs per chip. There is therefore a problem in addressing large FLCD because of the dual requirement to handle large voltage levels and provide a large number of outputs connections.
SUMMARY OF THE INVENTION
An object of the present invention is to reduce the voltage levels required by
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Graham Alistair
Hughes Jonathan R.
Towler Michael John
Powell Mark R.
The Secretary of State for Defence in Her Britannic Majesty's Go
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