Multiple valley controller for switching circuit

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

Reexamination Certificate

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Details

C323S225000, C323S271000, C323S222000

Reexamination Certificate

active

06341073

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to resonant switching power transfer devices, and more particularly to improved algorithms, methods and systems for analyzing and operating a switched power supply for efficient operation over a wide range of power output.
2. Description of the Prior Art
In conventional resonant switching converters such as quasi resonant control DC-to-DC converters, a switching device, typically in the form of a semiconductor switch, turns on and off repetitively to pulse power from a source at high current levels. A simple prototype circuit is shown in FIG.
1
.
As shown in
FIG. 2
, when the switch is turned on, the current ramps up at a generally linear rate, until the switch is turned off. The switch transitions are controlled by a controller, not shown in FIG.
1
. After the switch is turned off, the diode conducts, discharging the tank circuit, and transferring energy to the transformer secondary and load. When the output diode stops conducting, the voltage across the switch begins to oscillate, initially dropping. A typical quasi resonant control triggers the switch to begin conducting at the first nadir or valley of this oscillation, to begin the cycle again.
The active switch may be controlled to close at any portion of the cycle. However, the power consumed by switching is proportional to the voltage squared impressed on the switch times capacitance of the switch, and also switching frequency, and thus designs have evolved which attempt to turn the switch on during a zero or minimum voltage phase of the dynamic transient. This process is called zero voltage switching (ZVS). The minimum voltage across the active switch may be non-zero in DC power supplies during normal operation.
A related topology provides zero current switching, in which the conduction state of an active switch is changed when a current is zero, called zero current switching (ZCS).
In order to time the closing of the active switch, a number of techniques are traditionally employed, for example, analog sensing of a minimum voltage, threshold sensing, or the like. Since, in many designs, the ringing of the transient oscillation decays to a value above the minimum voltage, for example the positive supply rail, and complex sensing algorithms are difficult to implement, traditionally, the switching logic is controlled based on a time delay, a voltage threshold, or a first-derivative zero crossing trigger.
In a power supply designed for a range of loads, efficiency at low loads may be impaired due to switching power loss. In essence, a suitable low impedance semiconductor switch for high currents has a high intrinsic gate capacitance. Therefore, the typical strategy of activating the switch at the first valley of the turn-off transient to recharge the tank, and adjusting the charge time in dependence on the load (i.e., pulse width modulation), results in excess losses due to switching inefficiency.
It is well known in the art that a turn-on loss in a DC-DC converter is markedly reduced by applying the zero-volt switching (ZVS) method to the voltage-resonant converter.
A conventional Quasi-Resonant Converter (QRC) is designed to achieve zero-voltage switching, or at least minimum-voltage switching. That is, the power MOSFET is turned ON at the first valley (minimum) of the drain voltage. The rational is that the potential energy stored in the primary resonant capacitor (C=C
p
+parasitic) is equal to ½CV
2
. This energy is dissipated by the power MOSFET every time it switches on. So by minimizing V, power loss is minimized.
However, the actual switching power loss is ½CV
2
f, where f is the switching frequency of the power supply. The switching frequency of a QRC varies proportional to the input voltage, and inversely proportional to the output load. Hence switching power loss becomes unacceptably high under the worst-case combination of maximum input voltage and minimum load. This severely limits the operating range of a conventional QRC.
In a typical quasi resonant power supply design, for example using a Sanken F6656 controller, the controller does not detect the minimum value (“valley”) of drain voltage directly. Instead it relies on fixed threshold crossing detection. Hence zero-voltage switching is not achieved even under best operating condition, e.g., 110V AC input and 80W load.
The frequency of operation varies greatly with line and load conditions. The frequency is highest under the combination of maximum line input and minimum load. Higher frequency results in higher EMI, and also higher switching loss. Consequently, operation range of this QRC is severely restricted due to limited frequency range. This limitation is not the fault of the analog controller, but a problem inherent in the self-oscillating mode of quasi-resonant operation.
High frequency Resonant, Quasi Resonant, and Multi-Resonant Converters have been discussed in many articles, see, e.g., various publications and patents by Fred C. Lee of Virginia Power Electronics Center; U.S. Pat. Nos. 4,720,667 (Lee et al), 4,720,668 (Lee et al), 4,857,822 (Tabisz et al.), for several examples of zero-current-switched quasi-resonant converters. Soft-Switching techniques, which include zero-voltage switching (ZVS) and zero-current switching (ZCS), have been employed in those converters to reduce switching loss incurred by the main switching element(s), typically a power MOSFET, in order to improve the overall efficiency of the power converter.
Zero-current-switched quasi-resonant converters (ZCS-QRCs) reduce turn-off losses by shaping the switching transistor current to zero prior to turn-off. This allows ZCS-QRCs to operate at frequencies up to about 2 MHz. Further increase of the switching frequency of ZCS-QRCs is difficult to accomplish because of capacitive turn-on loss. Also, the Miller effect comes into play in that it relates to turn-on of the transistor at non-zero-voltage and the resultant parasitic oscillations caused by the output capacitance of the transistor.
Zero-voltage-switched quasi-resonant converters reduce the problem of turn-off losses by shaping the switching transistor voltage to zero prior to turn-on. As a result, ZVS-QRCs can operate at higher frequencies, up to 10 MHz. However, the ZVS-QRCs have two major limitations. One problem is excessive voltage stress to the switching transistor proportional to the load range. This makes it difficult to implement ZVS-QRCs with wide load variations. Another problem is caused by the junction capacitance of the rectifying diode used in the quasi-resonant converter. When the diode turns oft, this junction capacitance oscillates with the resonant inductance. If damped, these oscillations cause significant power dissipation at high frequencies; undamped, they adversely affect the voltage gain of the quasi-resonant converter and, thus, the stability of the closed-loop system.
By definition, a Quasi-Resonance mode means that the system operates with variable frequency and with discontinuous current. The oscillation frequency is not directly controlled for a quasi resonant converter. Instead, the ON-time T
on
and OFF-time T
off
of the power switching device is controlled. Frequency variation is a result of changes in T
on
and T
off
.
The ON-time of the power device is determined by the DC supply voltage, the primary inductance, the maximum drain current, as well as the feedback (regulation) voltage. In the case of a preferred embodiment of the invention, a quasi resonant converted embodiment is provided with a peak value of I
d
of 6A, which is given by V
th
(0.73V) divided by R
4
(0.12 ohm). At 110V AC input, dl/dt=V/L=150V/142 &mgr;H=1.06A/&mgr;S, approximately. The maximum T
on
is then 5.6 &mgr;S (in the absence of feedback voltage). The presence of feedback voltage adds a DC bias (which is proportional to the output error signal) to the current waveform. As the output voltage gets closer to tie regulated value, a higher DC bias is applied. This essentially lowers the

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