Multiple user reconfigurable CDMA processor

Details Multiple user reconfigurable CDMA processor Multiple user reconfigurable CDMA processor

2006-04-18

2006-04-18

Ha, Dac V. (Department: 2634)

Pulse or digital communications

Spread spectrum

Direct sequence

C375S150000, C713S100000, C713S321000, C713S500000, C714S739000, C327S116000, C327S119000

Reexamination Certificate

active

07031372

ABSTRACT:
A circuit consistent with certain embodiments of the present invention has a source of N reference clock frequencies (230), where N is an integer greater than one. N frequency extender circuits (954) receive the N reference clock frequencies and generating N frequency extended output clock signals therefrom. A plurality of N seed slewers (958) produce N seed update values. A plurality of N seed registers (962) each receive one of the N seed update values and produce N seed masks therefrom. A plurality of N logic circuits (966) each receive one of the N seed masks and one of the N frequency extended output clock signals. Each of the N logic circuits (966) produce a pseudorandom sequence from the seed mask and the frequency extended output clock signal. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

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