Multiple tile scaleable cooling system for semiconductor compone

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

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165 804, 257714, H05K 720

Patent

active

059235330

ABSTRACT:
A fluid-cooling system for the edge-cooling of semiconductor tiles that are arranged into rows and columns and are mounted on one or more panels is constructed with a coolant supply and return pipe and individual coolant supply and return lines for each of the panels. Fluid flows in separate fluid-cooling passageways for each of the columns of tiles. The passageways are coupled between the coolant supply line and the coolant return line for the panel. The passageways follow a winding path that provides cooling for a major portion of the periphery of all of the tiles that are in a column and for a minor portion of the periphery of all of said tiles that are in adjacent columns. The remaining edges of the tiles in the outermost columns of tiles of a panel that are not cooled by the outermost passageways are cooled by passageway segments that direct fluid from said fluid-cooling passageways. The tiles have a rectangular shape and may contain multi-chip semiconductor modules. The supply and return lines are preferably coupled to the supply and return pipes by quick disconnect couplers.

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patent: 5718117 (1998-02-01), McDunn
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patent: 5812372 (1998-09-01), Gaylon

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