Multiple test bench optimizer

Details Multiple test bench optimizer Multiple test bench optimizer

2007-03-13

2007-03-13

Rodriguez, Paul (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C716S030000, C716S030000

Reexamination Certificate

active

09843573

ABSTRACT:
Test benches, simulations, and scripts are invoked in parallel for testing multiple points in a circuit being synthesized in an Analog Mixed Signal environment. A simulation system for simultaneously optimizing performance characteristics in circuit synthesis uses a set of design parameters. At least one circuit model is used to incorporate the set of design parameters, each circuit model adapted to model a portion of the circuit pertaining to a performance characteristic. At least one analysis test bench is then connected to each circuit model. Each analysis test bench is adapted to model circuitry external to the circuit and control the type of analysis to be performed for each performance characteristic of the circuit.

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Frohlich et al., “A New Approach for Parallel Simulation of VLSI Circuits on a Transistor Level” IEEE 1998 vol. 45. No. 6.
Orr-S., “Synthesys Tool Enables Mixed-Signal Core Design” EE Times Nov. 1999. p. 1-5.

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