Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Sequential readout of plural counters or sequential sampling...
Patent
1981-10-13
1984-10-16
Heyman, John S.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Sequential readout of plural counters or sequential sampling...
377 44, H03K 2134, H03K 2116
Patent
active
044779186
ABSTRACT:
A system for reading out the contents of multiple counters onto a common bus comprising a plurality of synchronous binary counters arranged in a ring with each counter having N corresponding stages each having an output terminal on which appears the contents of the stage, an input terminal, and a clock pulse input terminal, with each stage responsive to a clock pulse supplied to its clock input terminal to transfer the signal logic level on its input terminal to its output terminal and with the output terminals of the stages of a given counter comprising the common bus. Also provided is a clock pulse source for supplying clock pulses to all of the clock input terminals and a switching signal source for generating a switching pulse. A switch associated with each stage is responsive to the switching pulse to connect the output terminal of each stage to the input terminal of the corresponding stage of the next adjacent counter in the ring of counters.
REFERENCES:
patent: 3146345 (1964-08-01), Conover, Jr.
patent: 3673390 (1972-06-01), Krebs
patent: 3778778 (1973-12-01), Ragen
patent: 3820082 (1974-06-01), Bauknecht et al.
patent: 4396829 (1983-08-01), Sugihara et al.
Brokl Stanley S.
McGuire Kenyon E. B.
Nossen Steve J.
Heyman John S.
Phillion D. W.
RCA Corporation
Tripoli J. S.
Troike R. L.
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